3.3 Using type-specific operations

3.3.4 Optimizing code for the MIPS architecture

The MIPS hardware can access each 32-bit word as four 8-bit bytes. These four bytes can be ordered in one of two ways: from most significant to least significant, called big-endian byte ordering, or vice versa, called little-endian byte ordering. For example, in a little-endian configuration, byte 0 of a word gives you the low eight bits; in a big-endian configuration, byte 0 of a word gives you the high eight bits.

Table 3.6 shows the byte ordering for the word at location 1000 containing the hexadecimal number#x12345678.

MIPS byte ordering

Address of byte	Little-endian	Big-endian
1000	#x78	#x12
1001	#x56	#x34
1002	#x34	#x56
1003	#x12	#x78

The byte ordering on a MIPS chip can be configured to be either little-endian or big-endian. By default, LCL/SGI produces code specifically tailored for big-endian machines. If, however, you would like your code to be portable across all machines that use the MIPS chip, you should set the:target option tocompile-file to produce code that can run on either type of machine. When you specify such a:target option, certain operations involving floating-point numbers might be slightly slower, because the code will check at run-time to see if the current machine is big-endian or little-endian.

By using the:target option, you can configure the Compiler to produce the following types of code:

• code that only runs on little-endian machines

• code that only runs on big-endian machines

• code that can run on both little-endian and big-endian machines

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